Non-volatile memory (NVM) devices are in general memory devices that retain, or store, data even when not powered. Presently, NVM devices are utilized in a wide range of applications including, for example, smart cards, microcontrollers (MCU), mobile phones, digital cameras, memory cards, and other applications where power is not always available, power is frequently interrupted, or lower power usage is required. Typical NVM devices include, for example, Erasable and Programmable Read Only Memory (EPROM) devices, Electrically Erasable and Programmable Read Only Memory (EEPROM) devices, Static Random Access Memory (SRAM) and flash memory. NVM devices are widely implemented in the form of embedded memory.
In recent years, various types of cells, storage mediums and program-and-read technologies have been developed. For instance, cell types of a memory cell include one-transistor (1T) cell, two-transistor (2T) cell and split-gate cell. Types of storage mediums include, for example, silicon-oxide-nitride-oxide-silicon (SONOS), floating gate (FG) and silicon nanocrystal (Si-nc). Program-and-read technologies include, for example, channel hot electron (CHE)/Fowler-Nordheim tunneling (FN), FN/FN and small scale integration (SSI)/FN. Regardless of the technologies utilized in a memory device, the reliability endurance and data retention of the memory device are critical factors to the performance of the NVM device.
In one existing design of memory cells of NVM devices, separate read and write (program) channels are utilized by increasing the cell size. The resulting cell is less prone to deterioration because no write stress is applied to the tunnel oxide layer for the read channel. Accordingly, with reduced degradation on the read channel, such design offers improved retention and endurance (e.g., 1×106 cycles). However, one shortcoming of such design is large cell size with decoupled program and read channels.
In another existing design of memory cells of NVM devices, separate read channel and erase channel are utilized. The memory cell has sharp corner with wrap-around in device geometry which facilitates forward electron tunneling and prevents anode hole injection and stress-induced leakage current to improve reliability. Such design offers good endurance (e.g., 1×106 cycles) compared to conventional stack-gate FG-type NVM. Additionally, in such design, the source line is non-silicided and thus has a higher resistive path for the source line. However, one shortcoming is the high resistance in the source line which tends to affect the performance.
Moreover, due to the ever-shrinking dimensions of semiconductor devices including NVM devices, interference such as floating gate-to-floating gate (FG-FG) interference has become a key limiting factor for memory cell scaling in flash memory devices, which is a type of NVM device.
Accordingly, there remains a need for a new design of memory cells of NVM devices, and a manufacturing method thereof, to address the aforementioned issues.